MARU Gen 2 · assembled, vertical

MARU

MARU™ Tower

The same blocks stacked instead of chained. Sensor, edge, and interface stages sit on one vertical axis, so the installed area is the area of one stage.

MARU Tower at an angle: sensor, edge, and interface stages stacked into a compact cube

Why vertical

Footprint is the constraint

In a machine cell the scarce dimension is rarely height — it is bracket area, cabinet width, the free space beside a conveyor. Tower puts the same optics and the same edge compute on a vertical axis so the mount stays small.

Because the stages are the platform's stages, everything downstream is unchanged: the same calibration, the same SDK, the same ROS 2 topics as Link and ONE.

Sensor stage optics
Edge stage compute
Interface stage I/O

Stages

What stacks

MARU Tower sensor stage seen from the front

Sensor stage

Vision or ToF optics on the top face.

MARU Tower edge stage seen from the front

Edge stage

On-device inference and calibration.

MARU Tower interface stage seen from the front

Interface stage

Power and the host link for the chosen bus.

Specifications

Platform specifications

3D depthToF · VCSEL 940 nm · 0.2–20 m · ±0.5%
2D imagingRGB + IR · 5 MP–8K · 45–155° diagonal FoV
Frame rate30–60 FPS
Edge computeRuns across edge SoCs · 10–100 TOPS · 10–20 ms on-device
Interfaces — HWUSB-C Ethernet SerDes HDMI/DP
Interfaces — SWROS 2 · REST/SDK API
Delivered asSensor + edge AI + I/O on one calibrated platform · Ruggedized field housing · factory-calibrated

Downloads

Documentation

Datasheet, mechanical drawing, and SDK guide ship with the production revision. Ask us for the current draft.

Send us the mounting envelope. We will tell you whether Tower fits it.